TWEPP2018 - (other twepp conferences)
17-21 September 2018
Antwerp, Belgium
published July 25, 2019
Antwerp, Belgium
published July 25, 2019
The workshop will cover all aspects of electronics for particle physics experiments, and accelerator instrumentation of general interest to users.
LHC experiments (and their operational experience) will remain a focus of the meeting but a strong emphasis on R&D for future experimentation will be maintained, such as SLHC, CLIC, ILC, neutrino facilities as well as other particle and astroparticle physics experiments.
The purpose of the workshop is:
- To present results and original concepts for electronic research and development relevant to experiments as well as accelerator and beam instrumentation at future facilitiest
- To review the status of electronics for the LHC experiments
- To identify and encourage common efforts for the development of electronics
- To promote information exchange and collaboration in the relevant engineering and physics communities.
Editorial Board
- Alessandro Marchioro
CERN
| Posters |
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Front-end Electronics of the Forward Strip Detector for the ATLAS HL-LHC Upgrade
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First Double-Sided End-Cap Strip Module for the ATLAS High-Luminosity Upgrade
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Automated Test Station for the Characterization of Custom Silicon PhotoMultipliers for the Mu2e Calorimeter
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Front-end hybrids for the strip-strip modules of the CMS Outer Tracker Upgrade
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A bipolar shaping amplifier for low background alpha/beta counters with silicon detectors.
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A 1 GS/s sampling digitizer designed with interleaved architecture (GSPS) for the LaBr3 detectors of the FAMU experiment
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Investigation of Single Event Latch-up effects in the ALICE SAMPA ASIC
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ATLAS Tile Calorimeter Link Daughterboard
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Radiation tests and production test strategy for the ALICE TOF readout upgrade board
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Radiation tolerant conditioning electronics for vacuum measurements
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A Delay Locked Loop for Time-to-Digital Converters with Quick Recovery and Low Hysteresis
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The Upgraded Microstrip Silicon Sensor Characterisation Facility of the University of Sheffield
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Characterization of Soft Error Rate Against Memory Elements Spacing and Clock Skew in a Logic with Triple Modular Redundancy in a 65nm Process
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High-Voltage Silicon JFET for HV Multiplexing for the ATLAS MicroStrip Staves
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Hybrid GaN and CMOS Integrated Module Radiation Hard DC-to-DC Converter
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Flexible Printed Circuit design and testing for the High-Granularity Timing Detector for the Phase II upgrade of the ATLAS calorimeter system
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The Embedded Local Monitor Board upgrade proposals
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Electronics Developments for Phase-2 Upgrade of CMS Drift Tubes
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New 63U ATCA rack: thermal performances and integration challenge
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CMS Drift Tubes Readout Phase 1 Upgrade
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CMS ECAL Upgrade Front End card: design and prototype test results
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Novel P-in-N Si-Sensor technology for high resolution and high repetition-rate experiments at accelerator facilities
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ATLAS Phase-II-Upgrade Pixel Demonstrator Read-out
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The CMS Level-1 muon trigger for the LHC Run II
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A Lightweight First-Level Muon Track Trigger for Future Hadron Collider Experiments
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New development in the CMS ECAL Level-1 trigger system to meet the challenges of LHC Run 2
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Study of Track Reconstruction using Retina algorithm for charged particles in magnetic field
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Input Mezzanine Board for the Fast Tracker(FTK) at ATLAS
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Concept, design and verification of components for an integrated on-detector silicon photonic multichannel transmitter
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New LpGBT-FPGA IP: Simulation model and first implementation
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Thermal Characterisation of the Versatile Link+ Transceiver
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A possible implementation of a detector specific extension of the FELIX firmware for the ITk Pixel sub-detector
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Machine learning: hit time finding with a neural network
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FPGA Implementation of an Artificial Neural Network for Subatomic Physics Experiment Particles Recognition
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GBT oriented firmware for Data Processing Boards for CBM
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Ethernet-based slow control system for parallel configuration of FPGA-based front-end boards
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An automated pipeline for continuous integration of FPGA firmware and software for the LHCb Run3 upgrade
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Remote Control Unit of the LHC Injector Complex Beam Loss Monitoring System
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ABACUS : Two fast amplifiers for the readout of LGAD detectors
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Design of a monolithic HR-CMOS sensor chip for the CLIC silicon tracker
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Design of a HVCMOS pixel sensor ASIC with on-chip readout electronics for ATLAS ITk Upgrade
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Algorithms for Threshold Dispersion Minimization of the CHIPIX65 Asynchronous Front-End
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The Quality-Assurance Test of the ATLAS New Small Wheel Read-Out Controller ASIC
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A Low-Noise Charge-Sensitive Amplifier for Gainless Charge Readout in High-Pressure Gas TPC
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A High Dynamic Range ASIC for Time of Flight PET with monolithic crystals
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The Readout and Data Transmission of a Monolithic Active Pixel Sensor prototype for the CEPC Vertex Detector
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An Ultra-Fast 10Gb/s 64b66b Data Serialiser Backend in 65nm CMOS Technology
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Prototype Front-end ASIC for Silicon-strip Detectors of J-PARC Muon g-2/EDM Experiment
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A 28 nm Fast Tracker Front-End for Phase-II Atlas sMDT Detectors
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A 130 nm CMOS PLL for Phase-II ATLAS-MDT TDC
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A Capacitor DAC for Charge Redistribution Analog to Digital Converter with Successive Approximation
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A System-Verilog Verification Environment for the CIC Data Concentrator ASIC of the CMS Outer Tracker Phase-2 Upgrades
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A high speed transmitter circuit for the ATLAS/CMS HL-LHC pixel readout chip
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A 65 nm Data Concentration ASIC for the CMS Outer Tracker Detector Upgrade at HL-LHC
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| Trigger |
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Serenity: An ATCA prototyping platform for CMS Phase-2
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NaNet: a Reconfigurable PCIe Network Interface Card Architecture for Real-time Distributed Heterogeneous Stream Processing in the NA62 Low Level Trigger.
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ALICE trigger system for LHC Run 3
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| Radiation Tolerant Components and Systems |
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Investigations into the effect of gamma irradiation on the leakage current of 130-nm readout chips for the ATLAS ITk strip detector
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Radiation hardness test of the nSYNC ASIC with 60 MeV proton beam
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Radiation hard Depleted Monolithic Active Pixel Sensors with high-resistivity substrates
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| Systems, Planning, Installation, Commissioning and Running Experience |
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Operation of the CMS Level-1 Calorimeter Trigger in High Pileup Conditions and Motivations for Phase-2
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Service hybrids for the silicon strip modules of the CMS Phase-2 Outer Tracker upgrade
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The Phase-I Trigger Readout Electronics Upgrade of the ATLAS Liquid Argon Calorimeters
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Design and development of the DAQ and Timing Hub for CMS Phase-2
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The End-of-Substructure (EoS) card for the Strip Tracker Upgrade of the ATLAS experiment
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Status of the Readout Electronics for the Triple-GEM Detectors of the CMS GE1/1 System and Performance of the Slice Test in the 2017-18 LHC Run
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Control and Monitoring for a serially powered pixel demonstrator for the ATLAS Phase II upgrade
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The VMM front-end integration in the Scalable Readout System: On the way to a next generation readout system for generic detector R&D and experiment instrumentation
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The Proton Timing System of the TOTEM experiment at LHC
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First performance measurements of the Fast Tracker Real Time Processor at ATLAS
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| Programmable Logic, Design Tools and Methods |
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Upgrade of the CMS Barrel Muon Track Finder for HL-LHC featuring a Kalman Filter algorithm and an ATCA Host Processor with Ultrascale+ FPGAs
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FELIX: the New Detector Readout System for the ATLAS Experiment
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Improved Tapped-Delay-Line Time-to-Digital Converter with Time-over-Threshold measurement for a new generation of Resistive Plate Chamber detectors
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A collaborative HDL management tool for ATLAS L1Calo upgrades
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Sorting of STS-XYTER2 data for microslice building for CBM experiment
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| Production, Testing and Reliability |
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Novel production method for large double-sided microstrip detectors of the CBM Silicon Tracking System at FAIR
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Test strategy for low failure rates and status of a highly integrated readout chip for PMTs in JUNO
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Reliability test results of the interconnect structures of the front-end hybrids for the CMS Phase-2 Tracker Upgrade
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| Power, Grounding and Shielding |
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System level serial powering studies of RD53A chip
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| Optoelectronics and Links |
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Radiation tolerance enhancement of silicon photonics for HEP applications
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Next generation of Radiation Tolerant Single-Mode Optical Links for Accelerator Instrumentation
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| Asic |
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Development of the monolithic "MALTA" CMOS sensor for the ATLAS ITK outer pixel layer
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Test results of irradiated CMOS pixel circuits in 150 nm CMOS technology for the ATLAS Inner Tracker Upgrade
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RD53A: a large scale prototype for HL-LHC silicon pixel detector phase 2 upgrades
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Characterization of the first prototype of the Silicon-Strip readout ASIC (SSA) for the CMS Outer-Tracker phase-2 upgrade
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PACIFIC: The readout ASIC for the SciFi Tracker of the LHCb detector
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Characterization of GEMINI, a 16-channels programmable readout interface for Triple-GEM detectors in 180nm CMOS
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Characterization of the MPA prototype, a 65 nm pixel readout ASIC with on-chip quick transverse momentum discrimination capabilities.
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