The back-end electronics card of the JUNO experiment
P.A. Petitjean*, Y. Yang, B. Clerbaux on behalf of the JUNO collaboration
Pre-published on:
October 13, 2020
Published on:
November 12, 2020
Abstract
The Jiangmen Underground Neutrino Observatory (JUNO) is a next generation multi-purpose anti-neutrino detector currently under construction in Jiangmen, in China, with the main goal to determine the neutrino mass hierarchy, as well as several neutrino mass and mixing parameters with a precision at the sub-percent level. The reactor electron anti-neutrinos of two power plants at a baseline of 53 km will be detected in the central part of the detector, which consists of 20 k-tons of liquid scintillator contained in a 35 m diameter acrylic sphere. The central detector is instrumented by more than 18000 20-inch photo-multiplier tubes (PMTs), and about 25600 3-inch small PMTs. Two veto systems are added to reduce the backgrounds. Data taking is expected to start at the end of 2021. The JUNO electronics system is separated into mainly two parts: the front-end electronics system performing analog signal processing (the underwater electronics), and after 100 meters Ethernet cables,the back-end electronics system, sitting outside water, consisting of the Back-End Cards (BEC), the DAQ and the trigger. For the front-end electronics, global control units (GCU) digitize the incoming analog signals, then store the data in a large local memory waiting for trigger decision, and send out event data corresponding to a certain trigger acknowledgement as well as trigger requests to the outside-water system. The BECs are used as concentrators to collect and compensate the incoming trigger request signals. The FPGA mezzanine cards handle all trigger request signals, and send their sum to the trigger system over an optical fiber. In order to test all the communication channels of the BECs in an efficient and fast way, a common baseboard with interfaces to different mezzanine boards is designed. The poster presents the JUNO electronics system, with an emphasis of the back-end electronics system and on the BECs : their design and the tests already performed.
DOI: https://doi.org/10.22323/1.364.0200
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