Validation of the Front-End Electronics and Firmware for LHCb Vertex Locator.
A. Fernandez Prieto* and P. Vázquez Regueiro
Pre-published on:
March 05, 2018
Published on:
March 20, 2018
Abstract
The LHCb Experiment will be upgraded to a trigger-less system reading out the full detector at 40 MHz event rate with all selection algorithms executed in a CPU farm. The upgraded Vertex Locator (VELO) will be a hybrid pixel detector read out by the ”VeloPix” ASIC with on-chip zero-suppression. A complete design overview of the VELO on-detector and off-detector electronics system will be presented. Results on the evaluation of the prototype boards and readout firmware are shown.
DOI: https://doi.org/10.22323/1.313.0121
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