Development of a Large Pixel Chip Demonstrator in RD53 for ATLAS and CMS Upgrades
E. Conti*
on behalf of the RD53 Collaboration,
M. Barbero,
D. Fougeron,
S. Godiot,
M. Menouni,
P. Pangaud, R. Alexandre, P. Breugnon, M. Bomben, G. Calderini, F. Crescioli, O. Le Dortz, G. Marchiori, D. Dzahini, F.E. Rarbi, R. Gaglione, T. Hemperek, F. Huegging, H. Krueger, P. Rymaszewski, M. Vogt, T. Wang, N. Wermes, M. Karagounis, F. Ciciriello, F. Corsi, C. Marzocca, G. De Robertis, F. Loddo, F. Licciulli, A. Andreazza, V. Liberali, A. Stabile, L. Frontini, M. Bagatin, D. Bisello, S. Gerardin, S. Mattiazzo, A. Paccagnella, D. Vogrig, S. Bonaldo, N. Bacchetta, F. De Canio, L. Gaioni, M. Manghisoni, V. Re, E. Riceputi, G. Traversi, L. Ratti, C. Vacchi, K. Androsov, R. Beccherle, G. Magazzu, M. Minuti, F. Morsani, F. Palla, S. Poulios, G.M. Bilei, M. Menichelli, P. Placidi, S. Marconi, G. Dellacasa, N. Demaria, G. Mazza, E. Monteil, L. Pacher, A. Rivetti, M.D. Da Rocha Rolo, A. Paternò, D. Gajanna, V. Gromov, B. Van Eijk, R. Kluit, A. Vitkovskiy, T. Benka, M. Havranek, Z. Janoska, M. Marcisovsky, G. Neue, L. Tomasek, V. Kafka, V. Vrba, E. Lopez-Morillo, F.R. Palomo, F. Munoz, I. Vila Álvarez, E. Jiménez, D. Abbaneo, J. Christiansen, S. Orfanelli, L.M. Jara Casas, S.J.M. Bell, M. Prydderch, S. Thomas, D.C. Christian, G. Deptuch, F. Fahim, J. Hoff, T. Zimmerman, S. Miryala, M. Garcia-Sciveres, D. Gnani, A. Krieger, K. Papadopoulou, T. Heim, R. Carney, B. Nachman, C. Renteira, V. Wallangen, M.R. Hoeferkamp and S. Seidelet al. (click to show)*: corresponding author
Pre-published on:
March 05, 2018
Published on:
March 20, 2018
Abstract
RD53A is a large scale 65 nm CMOS pixel demonstrator chip that has been developed by the RD53 collaboration for very high rate (3 GHz/cm$^2$) and very high radiation levels (500 Mrad, possibly 1 Grad) for ATLAS and CMS phase 2 upgrades. It features serial powering operation and design variations in the analog and digital pixel matrix for different testing purposes. The design and verification of RD53A are described together with an outline of the plans to develop final pixel chips for the two experiments.
DOI: https://doi.org/10.22323/1.313.0005
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